This invention relates to a high efficiency deflection circuit with controlled retrace pulse parameters.
Deflection amplifiers are often utilized to drive a generally sawtooth scanning current through a vertical or horizontal deflection winding mounted around the outside of an image pickup cathode ray tube or an image display tube, such as a television camera pickup tube or a television picture tube. Transistor deflection amplifiers of the general class-B push-pull type are frequently utilized instead of class-A amplifiers because of the inherent greater efficiency of the former type in that the amplifier can be operated with relatively little quiescent current, just enough to prevent crossover distortion, as first one output transistor and then the other conducts during the respective positive and negative portions of each deflection current cycle.
Ideally the direct operating voltage energizing the push-pull transistors should be not much higher than required for the signal voltage excursions of the stages. In this manner the undesirable power dissipation in the transistor output stages is minimized and transistors with lower power and peak voltage ratings can be utilized. The resultant cost saving to the equipment manufacturer and equipment buyer is highly desirable. However, during each deflection cycle there is a retrace portion during which the scanning current in the deflection winding must be reversed in a relatively short time in order to quickly return the electron beam to its start-of-scan position along one edge of the scanned raster to begin the next scanning interval. With the inductance of the winding and the peak current remaining the same during the scanning, or trace, and retrace portions of each deflection cycle, a relatively high voltage is developed across the winding to effect the necessary current reversal.
In the past, provision for this relatively high voltage retrace pulse has been made in three general ways. First, the operating voltage across the output transistors can be increased so they may conduct to the peak pulse level. The main disadvantage with this arrangement is that circuit power dissipation during the scanning period will be greatly increased and higher rated transistors must be utilized. Second, the winding can be disconnected from the output transistors during retrace and a resonant circuit including the deflection winding be allowed to resonate during the retrace period. The main disadvantages with this arrangement are that some damping means such as a diode is often required to allow only the required polarity of retrace pulse voltage and the damped energy is lost unless there is provided some energy storage means such as a capacitor to store this energy. Further, the retrace circuit resonant frequency may not provide the desired retrace interval width. Third, a disconnect circuit and a stage to switch in a higher operating voltage during the retrace interval may be utilized. However, even with this arrangement alone there is no assurance that the desired retrace interval duration will be achieved. In many situations, such as when three separate deflection circuits operate simultaneously to cause simultaneous deflection within three image pickup tubes in a color television camera, it is necessary that the retrace interval duration of each deflection circuit be accurately controlled to ensure the necessary registration of the three rasters.